Skills set required:
· Expert Knowledge and hands on experience in SOC/IP Verification.
· Strong on System Verilog and UVM, C/C++ test cases coding
· Should have Excellent debugging skills using VCS ad Verdi.
· Capable of independently defining test plans, developing new constrained random test cases and enhancing existing test cases.
· Capable of developing verification environment components such as end-to-end checkers/scoreboards, drivers and monitors.
· Expert at Verification and should lead the verification team, Coverage Driven Test Planning and Architecting Environments.
· Experienced in Assertions and coverage.
· Added advantage if exposed to CPU/GPU based SoC Verification
· Ability and desire to learn new methodologies, languages, protocols etc. is required
· Be familiar with scripting language, such as Perl, C shell, Makefile
|Experience||3 - 10 Years|
|Industry||Engineering/ Engineering Design / R&D / Quality|
|Key Skills||USB3.0 PCI Express 3.0 802.11 ad AXI/AMBA & SPI protocols UVM/OVM System Verilog OOP Verilog.|